Overview
The S10-SoC-AMC is an ATCA AMC.0 compliant mezzanine card that is designed to operate inside a PICMG MTCA.0 MicroTCA compliant chassis or PICMG AMC.0 compliant AdvancedMC Carrier boards. The module provides flexibility for implementing various custom frontends using VITA 57.1 FMC module along with the high performance 14nm Intel Stratix10 SoC FPGA on the module. The S10 SoC FPGA provides processing subsystem with ARM Cortex A53 processor and high performance FPGA fabric
Features
- Compliant with AMC.0 Rev 2.0, single-width, mid-size module specifications
- Device support –L and –VID Sx280, S210, Sx165, Sx110 and Sx085 SoCs
- Signal Processing and wireless communications centric design
- Single Vita 57.1 FMC mezzanine slot for application scalability and flexibility
- PICMG compliant AMC MMC controller with support for FRU information, multiple sensors and HPM.1 upgrade.
- Analog Devices AD9545 and Silabs Si5344 based low jitter clock synchronizer/synthesizer
Target Applications
- Wideband Wireless and RF Communications
- 5G wireless technology development
- Signal Processing / Image Processing
- Ethernet/SRIO based signal processing devices
Front Panel Interfaces
- FMC (Vita 57.1) mezzanine interface with support for
- All LA, HA, and HB signals
- 10 serial MGT SERDES signals
- Two GBTCLK (GBTCLK0/1) signals
- CLK0, 1, 2 amd 3 for LA/HA/HB
- FMC I2C signals
- Fix 1.8V VADJ only
- Micro-USB 2.0 for dual serial console access to S10 SOC and MMC controller
- Micro-USB 2.0 interface for USB Blaster II FPGA configuration interface
- 5-pin front panel connector for module configuration and debugging purposes
AMC Backplane Interfaces
- AMC Fat Pipe region ports 4-7, 8-11, 12-13 and 17-18 directly routed to the SoC FPGA.
- AMC Common Options Region ports 0 and 1 ports routed the SoC HPS MAC through 1000Base-X FPGA fabric
- Connections for FCLK and TCLK A/B/C/D QMC clocks with support for programmable jitter cleaner and synthesizer
- IPMI compliant AMC IPMB-L support for module management and control using on-board microcontroller
Fabric Memory and SDM Configuration Interfaces
- Dual 64-Bit DDR4 interfaces one each for HPS subsystem and FPGA fabric
- SDM configuration options for QSPI, microSD and JTAG
- 512Mbit Micron QSPI Flash memory
- MicroSD slot for FPGA configuration through microSD
- plug-in memory card
- On-board 16Gbyte eMMC storage device
On-board Development and Debug Support
- Integrated USB Blaster II
- Remote AMC module management and control using MMC controller
- Temperature and voltage monitoring sensors through IPMI
- Automatic over-temp shut down
- IPMI event triggers for temperature thresholds
- Multiple on-board and front panel diagnostic and status LED’s
Power Tree
- AMC +3.3V management power for MMC and related circuitry
- Draws rest of the power from the AMC +12V payload power
- AMC management interface control payload power enable/disable
- Low noise regulator modules for the DDR4 and transceiver voltage rails
- Power switches with overload protection for FMC module
