UART Master IP Core Solution

Overview

The UART Master IP core provides a simple and efficient method of data exchange between devices. UART is a 2-wire serial bus interface that can operates in half as well as full duplex mode.

Features

  • Programmable host clock division to generate Baud rate from 1200 to 115200.
  • Programmable Number of Data bits, stop bits and Parity bit control.
  • Programmable interrupts to selectively generate interrupts to host.
  • Configurable Data FIFO Depth for Receive and Transmit.